SecondSourceJudgment rebuilt from primary sources
Product & chips · Aug 5, 2026

"All serious Chinese fabs will have N+3 level tech": a zero-evidence diffusion claim, against a teardown pointing the other way.

Chips & semiconductors · Trend watch (posts originally published July 20–21)

From the Aug 5, 2026 daily brief

The same commentator argues the real story in Chinese advanced process is diffusion — not just SMIC, China's largest foundry, but multiple fabs reaching N+3, SMIC's third-generation 7nm-class process (Teortaxes, July 20). The claim has one genuine crossing point with the evidence: SemiAnalysis's physical teardown in June measured SMIC N+3's transistor density actually catching up to TSMC's previous-generation N6 (SemiAnalysis, June 2026). But that same teardown argues the opposite direction: the density was won without the newest lithography (EUV), by multi-patterning older DUV machines; once normalized, the density still clearly trails Intel's latest process; and the phone chip built on it performs at roughly the level of a three-year-old Android flagship, with a wider power-consumption gap. The honest joint read: a single-point density catch-up to one prior generation, with the power and yield bill unresolved — and "multiple fabs will replicate it" has zero evidence so far: no fab names, no timelines, no sourcing. When the next Chinese chip headline lands, sort it first — single-point breakthrough, or replicable capacity? The two mean completely different things for supply.

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